Verilog
| Use attributes for filter ! | |
| Influenced | SystemVerilog |
|---|---|
| Filename extensions | v,. vh |
| Typing discipline | weak |
| First appeared | 1984 |
| Stable release | IEEE |
| 9 November 2005 | |
| Influenced by | C |
| Fortran | |
| Date of Reg. | |
| Date of Upd. | |
| ID | 1274197 |
About Verilog
Verilog, standardized as IEEE 1364, is a hardware description language used to model electronic systems. It is most commonly used in the design and verification of digital circuits at the register-transfer level of abstraction.
Verilog Photos
