System-on-Chip Test Architectures: Nanometer Design for Testability photograph

System-on-Chip Test Architectures: Nanometer Design For Testability

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Google books books.google.com
Originally published 2008
GenresThesis
EditorsCharles E. Stroud
Nur A. Touba
Date of Reg.
Date of Upd.
ID1885716
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About System-on-Chip Test Architectures: Nanometer Design For Testability


Modern electronics testing has a legacy of more than 40 years. The introduction of new technologies, especially nanometer technologies with 90nm or smaller geometry, has allowed the semiconductor industry to keep pace with the increased performance-capacity demands from consumers. . . .

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