Low Power Digital CMOS Design photograph

Low Power Digital CMOS Design

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Originally published June 30, 1995
Authors Robert W. Brodersen
Anantha P. Chandrakasan
GenresThesis
Date of Reg.
Date of Upd.
ID2058354
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About Low Power Digital CMOS Design


Power consumption has become a major design consideration for battery-operated, portable systems as well as high-performance, desktop systems. Strict limitations on power dissipation must be met by the designer while still meeting ever higher computational requirements. . . .

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